YOUR REVISION ROUTE
Use the summaries to reconnect the ideas. Then close your notes and explain them before flipping a card. Select uncertain cards to build a revision list linked to the lessons.
3.1 | COMPUTER ARCHITECTURE
The CPU executes instructions, processes data and coordinates operations. A microprocessor implements a processor on a single integrated-circuit chip. Instructions specify operations; data supplies the information processed.
CPU COMPONENTS | WHERE, WHAT AND NEXT
| Component | Role |
|---|---|
| CU | Decode instructions and coordinate execution |
| ALU | Perform arithmetic and logic |
| PC | Address of the next instruction to fetch |
| MAR | Address for the current memory access |
| MDR | Instruction or data being transferred to/from memory |
| CIR | Current instruction |
| ACC | Working value or result |
In Von Neumann architecture, instructions and data share main memory. The address bus selects locations; the data bus carries instructions/data in either direction; the control bus coordinates transfers and status.
Address 20 and its contents 42 are different. MAR holds 20 to select the location; MDR receives 42 from it.
FETCH, DECODE, EXECUTE | TRACE ONE INSTRUCTION
Assume PC = 100, memory[100] = LOAD 20 and memory[20] = 42. Each instruction occupies one location in this teaching model.
| Stage | Change | Meaning |
|---|---|---|
| Fetch | MAR ← PC = 100 | Select instruction location |
| Fetch | MDR ← memory[100]; CIR ← MDR | Read and preserve LOAD 20 |
| Fetch | PC ← 101 | Prepare next sequential address |
| Decode | CU interprets LOAD 20 | Determine operation and data address |
| Execute | MAR ← 20; MDR ← memory[20] = 42 | Read operand data |
| Execute | ACC ← 42 | Complete the load |
CIR retains LOAD 20 while MDR is reused for 42. A branch can change PC. Not every instruction adds numbers or reads a separate operand.
Revisit the labelled architecture diagram and interactive FDE model
CORES, CACHE AND CLOCK
| Factor | How it can help | Qualification |
|---|---|---|
| Cores | Run independent instruction streams concurrently | Software and dependencies limit parallel work |
| Cache | Keep useful instructions/data near the CPU | Benefit depends on cache hits and access pattern |
| Clock speed | Provide more cycles per second | Cycles are not the same as instructions; architectures differ |
1 GHz is one billion cycles per second. Six billion required cycles take three seconds at 2 GHz or two at 3 GHz, only under the stated equal-cycle-count model.
Doubling cores or cache does not guarantee half the runtime. Compare the workload and other system limits.
INSTRUCTION SETS AND EMBEDDED SYSTEMS
An instruction set is the complete collection of machine-code instructions a CPU can execute. A program uses those instructions in a sequence. In the teaching ADD 21 instruction, the opcode specifies addition and the operand address selects a value in memory.
With ACC = 12 and memory[21] = 8, ADD 21 produces ACC = 20, not 33. Readable mnemonics stand for binary encodings, which depend on the processor’s instruction set.
An embedded system is integrated into a larger device for a dedicated function or related functions. Washing controllers, braking controllers and alarm systems are examples. Multiple modes, displays or networking do not automatically make a system general purpose.
3.2 | INPUT, OUTPUT AND SENSORS
Input captures data or commands; processing applies instructions; output presents information or performs an action. A touchscreen combines touch input with visual output.
INPUT DEVICES | MATCH DATA TO CAPTURE
| Device | Mechanism / reminder |
|---|---|
| Keyboard | Detect key presses |
| Optical mouse | Compare surface images to track movement |
| Microphone | Convert sound vibrations into a signal |
| Camera | Capture light using an image sensor |
| Barcode reader | Decode a pattern, often an identifier used for a database lookup |
| QR reader | Decode a two-dimensional pattern, such as a URL or identifier |
| 2D scanner | Capture a flat image; OCR separately recognises text |
| 3D scanner | Capture surface geometry for a model |
Resistive touch uses pressure joining conductive layers. Capacitive touch detects a capacitance change. Infra-red touch detects interrupted beams. Do not describe all touchscreens as pressure-sensitive.
OUTPUT DEVICES | MATCH THE REQUIRED RESULT
| Device | Operation / distinction |
|---|---|
| Actuator | Produce a physical action, such as moving a valve |
| Speaker | Vibrate a diaphragm to create sound |
| LED-backlit LCD | LEDs provide light; the LCD panel controls it |
| LCD projector | Liquid-crystal panels control projected light |
| DLP projector | Tiny mirrors direct light towards/away from the lens |
| Inkjet | Deposit liquid ink droplets |
| Laser printer | Charge pattern attracts toner; transfer and fuse with heat/pressure |
| 3D printer | Build an object from a digital model, commonly layer by layer |
Choose using the purpose and constraints. A projector suits a shared large image; a laser printer may suit frequent text printing. A laser does not burn the letters into paper, and a 3D printer does not scan the object.
SENSORS | NAME THE QUANTITY
| Sensor | Captured data |
|---|---|
| Acoustic | Sound-related data / sound level |
| Accelerometer | Acceleration |
| Flow | Fluid movement rate |
| Gas | Specified gas presence/concentration |
| Humidity | Water vapour in air |
| Infra-red | Infra-red radiation or received changes, depending on design |
| Level | Fill height |
| Light | Light intensity |
| Magnetic field | Magnetic-field presence/strength/direction |
| Moisture | Water content or wetness of material |
| pH | Acidity / alkalinity |
| Pressure | Force per unit area |
| Proximity | Object presence/nearness |
| Temperature | How hot/cold something is |
Humidity is not soil moisture; flow is not tank level. A passive PIR detector does not emit a measuring beam. Sensor design determines its output.
Monitoring collects/reports; control uses readings and rules to affect a process. Sensors measure, processors decide according to instructions, and actuators act. Analogue signals may need conversion, but some sensors already provide digital data.
3.3 | DATA STORAGE
Primary storage includes RAM and ROM directly accessible by the CPU in this syllabus. Secondary storage preserves files and programs through the input/output system. Physical position inside a case does not define the category.
RAM, ROM AND PHYSICAL STORAGE
| Type | Remember |
|---|---|
| RAM | Volatile read/write working instructions/data |
| ROM | Non-volatile essential firmware/startup instructions |
| Magnetic HDD | Magnetic patterns on tracks/sectors of rotating platters |
| Optical | Laser and detector read encoded reflected-light patterns |
| Solid-state flash | Non-volatile electronic cell states; no mechanical read/write movement |
HDDs offer capacity but have mechanical access delays. SSDs, SD cards and USB flash drives use electronic storage. In the syllabus floating-gate model, stored charge changes transistor behaviour; NAND/NOR arrangements provide flash organisation.
Optical pits/lands are part of an encoded pattern, not a universal one-pit-equals-one mapping. Writable and read-only media differ.
VIRTUAL MEMORY AND CLOUD
Virtual memory uses secondary storage as backing for pages not held in RAM. Needed pages are brought into RAM; frequent transfers add waiting because secondary storage is slower than RAM.
Virtual memory does not create physical RAM chips. More suitable RAM can reduce paging if the working set then fits.
Cloud storage holds data on physical remote servers accessed through a network. It can support access across devices and sharing, but remote operations depend on connectivity and the service.
Local files can support offline work. Cloud files may also be available offline if local copies are retained. Sync can propagate deletion, so it is not automatically an independent backup. Evaluate access, speed, cost, permissions and recovery.
3.4 | NETWORK HARDWARE
A NIC supplies network access hardware. MAC and IP addresses serve different delivery roles. A router forwards packets between networks.
ADDRESSES AND ROUTERS
| Term | Core distinction |
|---|---|
| MAC | Typical 48-bit interface address, six hex pairs; manufacturer/device code in the syllabus model |
| IP | Logical address configured/allocated for packet delivery and routing |
| Static | Configured to remain the same until changed |
| Dynamic | Allocated automatically and may change |
| IPv4 | 32 bits; four decimal groups, each 0–255 |
| IPv6 | 128 bits; full form eight hexadecimal groups |
| Router | Uses destination IP and routing information to select a next hop |
Manufacturer MACs normally stay with the interface, but overrides/randomisation exist. An IP can change when joining another network. A dynamic address does not have to change at every reconnection.
A combined router can connect a LAN towards the internet and provide DHCP address allocation. Same-subnet traffic can remain local. Public IPv6 notation can be shortened without changing its 128-bit length.
COMMON MISTAKES
- Confusing a memory address with its contents.
- Putting the next instruction itself in PC rather than its address.
- Claiming GHz is a universal instruction count.
- Calling a sensor an actuator or mixing humidity with moisture.
- Assuming a scanned image is already editable text.
- Confusing RAM working data with a saved file.
- Assuming cloud sync guarantees backup.
- Treating MAC/IP or static/IPv4 as interchangeable terms.
READY TO TEST YOURSELF?
Trace LOAD, justify a device, select a sensor, explain paging and distinguish network addresses. Use the cards to identify which explanations need more practice.