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FETCH, DECODE AND EXECUTE CYCLEX 

HARDWARE AND OPERATION | PRIMARY MEMORY

DESIGNED FOR IB EXAMINATIONS
OBJECTIVES
A1.1.4 Explain the purposes of different types of primary memory.
  • Random-access memory (RAM), read only memory (ROM), cache (L1, L2, L3), registers
  • The interaction of the CPU with different types of memory to optimize performance
  • The relevance of the terms “cache miss” and “cache hit”
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SECTION 1 | RAM, ROM AND CACHE

Primary memory refers to memory that is directly accessible by the CPU. Different types of primary memory exist to balance speed, capacity, and cost, allowing a computer system to operate efficiently. The main types of primary memory are random-access memory (RAM), read only memory (ROM), cache memory (L1, L2, L3), and registers.

Random-Access Memory (RAM)
Random-access memory (RAM) is the main working memory of a computer system.
  • It stores programs and data that are currently in use.
  • RAM is volatile, meaning its contents are lost when the computer is powered off.
  • The CPU frequently reads from and writes to RAM during program execution.

RAM is significantly faster than secondary storage (such as hard drives or SSDs) but slower than cache and registers. Its purpose is to provide a large, flexible memory space for running applications and the operating system.

Read Only Memory (ROM)
Read only memory (ROM) stores data that is essential for starting the computer.
  • ROM is non-volatile, so its contents are preserved when power is removed.
  • It typically contains firmware, such as the bootstrap program used during system start-up.
  • Data stored in ROM is not normally changed during regular operation.

The purpose of ROM is to ensure that critical start-up instructions are always available, even when the system is turned off.

Cache Memory (L1, L2, L3)
Cache memory is a small, high-speed memory located close to or within the CPU.
  • It stores copies of frequently accessed data and instructions.
  • Cache memory reduces the time needed for the CPU to access data compared to fetching it from RAM.

Cache is organised into levels:
  • L1 cache: The smallest and fastest cache, located inside each CPU core.
  • L2 cache: Larger than L1 and slightly slower, may be core-specific or shared.
  • L3 cache: The largest and slowest cache, typically shared between multiple cores.

The purpose of cache memory is to bridge the speed gap between the CPU and RAM, improving overall system performance.

Registers
Registers are the fastest and smallest type of primary memory.
  • They are located directly inside the CPU.
  • Registers store data, addresses, and instructions that are currently being processed.
  • Access to registers is faster than access to cache or RAM.

Examples include the program counter, instruction register, accumulator, and memory address register. The purpose of registers is to provide immediate access to critical values during instruction execution.

Summary of Purposes
  • Registers: Hold data and instructions currently in use by the CPU.
  • Cache: Store frequently used data to reduce memory access time.
  • RAM: Store programs and data currently being executed.
  • ROM: Store essential start-up instructions permanently.

These different types of primary memory work together to provide a balance between speed, capacity, and reliability, enabling efficient CPU operation and system performance.
Quick Check: Primary Memory Types

Which statement correctly describes the purpose of cache memory in a computer system?

A. To permanently store start-up instructions that are needed when the computer is powered on.
B. To store frequently used data and instructions close to the CPU to reduce access time.
C. To provide long-term storage for user files and applications.
D. To store all program data even when the computer is powered off.

SECTION 2 | INTERACTION WITH THE CPU

The CPU interacts with different types of primary memory in a structured way to maximise performance. Because memory types vary significantly in speed, size, and cost, computer systems use a memory hierarchy that ensures the CPU accesses the fastest possible memory whenever feasible.

The Memory Hierarchy and CPU Access
Primary memory is organised in levels based on proximity to the CPU:
  1. Registers
  2. Cache memory (L1, L2, L3)
  3. Random-access memory (RAM)

As distance from the CPU increases, access speed decreases and capacity increases. The CPU always attempts to retrieve data from the fastest available memory before accessing slower memory.

CPU Interaction with Registers
  • Registers are accessed directly by the CPU during instruction execution.
  • Instructions and data required immediately by the ALU and control unit are stored in registers.
  • Because register access is extremely fast, their use minimises delays during the fetch–decode–execute cycle.

The limited number of registers means they can only store a small amount of data, so they are used for the most time-critical values.

CPU Interaction with Cache Memory
Cache memory acts as an intermediary between the CPU and RAM.
  • When the CPU requires data, it first checks the L1 cache, then L2, and then L3.
  • Cache stores copies of data and instructions that are frequently used or likely to be used soon.
  • This exploits locality of reference, where programs tend to reuse recent data or instructions.

By retrieving data from cache instead of RAM, the CPU significantly reduces access time and increases execution speed.

CPU Interaction with RAM
RAM stores the programs and data currently in use.
  • If required data is not found in cache, it is fetched from RAM.
  • Accessing RAM is slower than accessing cache, so frequent RAM access can reduce performance.
  • Once data is fetched from RAM, it is often copied into cache for faster future access.

RAM provides the capacity needed to run complex programs, even though it is slower than cache and registers.

Optimising Performance Through Memory Interaction
Performance optimisation occurs because:
  • Frequently accessed data is kept close to the CPU in registers and cache.
  • Larger, slower memory is accessed less often.
  • Data is automatically moved between memory levels without programmer intervention.

This layered interaction allows the CPU to operate at high speed most of the time, despite relying on slower memory technologies for capacity.

Overall Impact on System Performance
  • Fast access to registers and cache reduces CPU idle time.
  • Efficient cache use minimises slow RAM accesses.
  • The memory hierarchy balances speed, cost, and storage capacity.

The CPU optimises performance by interacting with different types of memory in a hierarchical manner. By prioritising fast, close memory for frequently used data and relying on larger, slower memory only when necessary, modern computer systems achieve efficient and high-speed execution.​
Quick Check: CPU–Memory Interaction

Why does the CPU check cache memory before accessing RAM when it needs data?

A. Cache memory stores data permanently, while RAM is volatile.
B. Cache memory is much faster than RAM and reduces data access time for frequently used data.
C. Cache memory contains all data used by the operating system.
D. Cache memory replaces the need for registers during instruction execution.

SECTION 3 | CACHE MISS AND CACHE HIT

When the CPU requires data or an instruction, it first checks cache memory before accessing RAM. The effectiveness of this process is described using the terms cache hit and cache miss. These concepts are essential for understanding how memory access affects system performance.

Cache Hit
A cache hit occurs when the data or instruction requested by the CPU is found in cache memory.
  • The CPU retrieves the data directly from cache.
  • Access time is very short compared to accessing RAM.
  • Program execution continues with minimal delay.

A high cache hit rate improves performance because the CPU spends less time waiting for data.

Cache Miss
A cache miss occurs when the requested data or instruction is not found in cache memory.
  • The CPU must fetch the data from a lower level of the memory hierarchy, usually RAM.
  • This process takes significantly longer than a cache access.
  • Once retrieved, the data is typically copied into cache for future use.

Frequent cache misses can slow down program execution because the CPU must wait for slower memory accesses.

Types of Cache Miss (Conceptual Overview)
While detailed classification is beyond the required depth, cache misses generally occur because:
  • The data has not been accessed before.
  • The cache does not have enough space to store all required data.
  • Previously stored data has been replaced.

Understanding these causes helps explain why cache size and design affect performance.

Relevance to System Performance
Cache hits and misses are important because:
  • They directly influence the speed at which the CPU can execute instructions.
  • Systems with higher cache hit rates perform better for most workloads.
  • Efficient use of cache reduces the frequency of slow RAM accesses.

Program behaviour that repeatedly accesses the same data or instructions tends to result in more cache hits and better performance.

Summary
  • A cache hit means data is found in cache, resulting in fast access.
  • A cache miss means data must be fetched from slower memory.
  • Performance improves when cache hits occur more frequently than cache misses.

Cache hits and cache misses describe how effectively cache memory supports CPU operation. Their relevance lies in their direct impact on execution speed and overall system performance.
Quick Check: Cache Hits and Cache Misses

What is the main reason a cache hit improves CPU performance?

A. The CPU does not need to execute the instruction when a cache hit occurs.
B. The CPU can access data from cache much faster than from RAM.
C. Cache hits permanently store data in memory.
D. Cache hits reduce the amount of data stored in RAM.
Primary Memory | Memory that is directly accessible by the CPU and used to store data and instructions needed for immediate processing.

Random-Access Memory (RAM) | A volatile type of primary memory that stores programs and data currently in use. Its contents are lost when power is switched off.

Read Only Memory (ROM) | A non-volatile type of primary memory that stores essential start-up instructions and firmware required when the computer is powered on.

Register | A very small, extremely fast storage location inside the CPU used to hold data, addresses, or instructions currently being processed.

Cache Memory | A small, high-speed memory located close to or within the CPU that stores frequently accessed data and instructions to reduce access time.

L1 Cache | The smallest and fastest level of cache memory, located inside each CPU core.

L2 Cache | A larger and slightly slower cache than L1, which may be dedicated to a single core or shared between cores.

L3 Cache | The largest and slowest cache level, typically shared among multiple CPU cores.

Memory Hierarchy | The structured arrangement of memory types by speed, size, and proximity to the CPU, from registers to cache to RAM.

Volatile Memory | Memory that loses its contents when power is removed, such as RAM.

Non-Volatile Memory | Memory that retains its contents when power is removed, such as ROM.

Cache Hit | A situation where the CPU finds the required data or instruction in cache memory, resulting in fast access.

Cache Miss | A situation where the required data or instruction is not found in cache memory and must be retrieved from slower memory, usually RAM.

Access Time | The time taken to retrieve data from a memory location.

Locality of Reference | The tendency of programs to repeatedly access the same data or instructions or data located close together in memory.

Performance Optimisation | The process of improving system speed and efficiency by reducing delays in data access and instruction execution.
  1. Describe the purpose of random-access memory (RAM) in a computer system.
  2. Explain why read only memory (ROM) must be non-volatile.
  3. Describe the role of cache memory and explain why it improves system performance.
  4. Explain the difference between L1, L2, and L3 cache.
  5. Describe the purpose of registers within the CPU.
  6. Explain how the memory hierarchy helps to optimise CPU performance.
  7. Describe how the CPU interacts with cache memory when executing instructions.
  8. Explain what is meant by a cache hit and why it is desirable.
  9. Explain what is meant by a cache miss and how it affects system performance.
  10. Using an example, explain how locality of reference can lead to improved cache performance​

Sample Answers – A1.1.4 Primary Memory

1. Purpose of RAM

Random-access memory stores programs and data that are currently being used by the CPU. It allows fast read and write access during program execution but is volatile, so its contents are lost when power is removed.

2. Importance of ROM being non-volatile

ROM must be non-volatile so that essential start-up instructions are available every time the computer is powered on. Without non-volatile memory, the system would not know how to begin loading the operating system.

3. Role of cache memory

Cache memory stores frequently used data and instructions close to the CPU. This reduces the time taken to access data compared to fetching it from RAM, improving overall system performance.

4. Difference between L1, L2, and L3 cache

L1 cache is the smallest and fastest cache located within each CPU core. L2 cache is larger and slightly slower, and may be shared or dedicated. L3 cache is the largest and slowest cache level and is usually shared between multiple cores.

5. Purpose of registers

Registers store data, instructions, and addresses that are currently being processed by the CPU. They provide the fastest possible access and are essential during the fetch–decode–execute cycle.

6. Memory hierarchy and performance

The memory hierarchy places the fastest and smallest memory closest to the CPU and larger, slower memory further away. This ensures the CPU usually accesses fast memory, reducing delays and improving performance.

7. CPU interaction with cache

When executing instructions, the CPU first checks cache memory for required data. If the data is found, it is accessed quickly. If not, the CPU retrieves it from RAM and may store a copy in cache for future use.

8. Cache hit

A cache hit occurs when the CPU finds the required data in cache memory. This is desirable because cache access is much faster than accessing RAM, resulting in quicker instruction execution.

9. Cache miss

A cache miss occurs when the required data is not found in cache and must be fetched from RAM. This increases access time and can slow down overall system performance.

10. Locality of reference

Locality of reference means programs tend to reuse the same data or instructions. For example, a loop repeatedly accessing the same variables increases the likelihood of cache hits, improving performance.

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